Automation of program code vectorization for the use of SIMD instructions

Abstract

A significant slowdown in processor performance growth is associated with approaching the physical limits of reducing transistor size. This has led to the situation where traditional ways of increasing performance (increasing the clock frequency or the number of cores) no longer fully deliver performance gains. In modern processors, SIMD (Single Instruction, Multiple Data) instruction-set architectures play an important role in increasing computing performance. They allow a processor to perform one operation on multiple data streams simultaneously on a single core. In such a situation, parallel processing at the data level, implemented using SIMD instructions, becomes key. Directing the compilation process with special directives, options, and proper data organization makes it possible to obtain an optimized, vectorized code without explicitly using SIMD instructions in the program source code. However, the effectiveness of such mechanisms largely depends on a number of factors: the processor architectural features, the compiler version, the source code quality, and the optimizer state. The article analyzes some existing methods and tools for vectorizing code using SIMD instructions and proposes an approach to automating vectorization by inserting labels into source code, detecting section boundaries in compiled code, analyzing instructions within sections, and generating a report with a link to the source code. A comparative analysis of existing vectorization tools and the developed prototype is conducted. The proposed approach allows for automating the verification of code vectorization with line-level accuracy and works even with aggressive optimization, including function embedding.